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| ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Description The ICS556-04 is a low-skew, crystal input compatible clock buffer with oscillator. This device offers the lowest skew. See the ICS552-02 for a 1-to-8 low skew buffer. For more than eight outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL-based low-skew output devices. Contact ICS for all of your clocking needs. Features * * * * * * Extremely low-skew outputs (50 ps maximum) Packaged in 8-pin SOIC Operating voltages of 2.5 to 5.0 V Low-power CMOS technology Industrial temperature range Available in Pb (lead) free package Block Diagram Q0 5 to 27 MHz Crystal or clock X1/ICLK Q1 Crystal Oscillator/ Buffer Q2 Q3 X2 Optional crystal capacitors MDS 556-04 C I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 030905 te l (40 8) 2 97-12 01 w w w. i c st . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Pin Assignment VDD X 1 / I CL K X2 GN D 1 2 3 4 8 7 6 5 Q4 Q3 Q2 Q1 8 - p i n ( 1 5 0 mi l ) S OI C Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name VDD X1/ICLK X2 GND Q1 Q2 Q3 Q4 Pin Type Power Input Input Power Output Output Output Output Pin Description Connect to +2.5 V, +3.3 V or +5.0 V. Crystal or clock input (5 V tolerant input). Connect to 5 to 27 MHz input. Connect to a fundamental mode crystal. Leave open for clock input. Connect to ground. Clock Output 1. Clock Output 2. Clock Output 3. Clock Output 3. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 F should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible. A 33 series terminating resistor may be used on each clock output if the trace is longer than 1 inch. To achieve the low output skew that the ICS556-04 is capable of, careful attention must be paid to board layout. Essentially, all four outputs must have identical terminations, identical loads, and identical trace geometries. If not, the output skew will be degraded. For example, using a 30 series termination on one output (with 33 on the others) will cause at least 15 ps of skew. Crystal Information The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used. MDS 556-04 C In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS556-04. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD Output Enable and All Outputs ICLK Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V -0.5 V to 5.5 V -40 to +85 C -65 to +150C 125C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. -40 +2.375 Typ. Max. +85 +5.25 Units C V DC Electrical Characteristics VDD=2.5 V 5%, Ambient temperature -40 to +85 C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Operating Supply Current Nominal Output Impedance Short Circuit Current Symbol VDD VIH VIL VOH VOL IDD ZO IOS Conditions Min. 2.375 2.0 Typ. Max. 2.625 0.8 Units V V V V V mA mA IOH = -12 mA IOL = 12 mA No load, 27MHz 2 0.4 25 20 28 MDS 556-04 C In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER DC Electrical Characteristics (continued) VDD=3.3 V 5% , Ambient temperature -40 to +85 C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Nominal Output Impedance Short Circuit Current Symbol VDD VIH VIL VOH VOL VOH IDD ZO IOS Conditions Min. 3.15 2.0 Typ. Max. 3.45 0.8 Units V V V V V V IOH = -25 mA IOL = 25 mA IOH = -12 mA No load, 27 MHz 2.4 0.4 VDD-0.4 35 20 50 mA mA VDD=5 V 5% , Ambient temperature -40 to +85 C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Nominal Output Impedance Short Circuit Current Symbol VDD VIH VIL VOH VOL VOH IDD ZO IOS Conditions Min. 4.75 2.0 Typ. Max. 5.25 0.8 Units V V V V V V IOH = -35 mA IOL = 35 mA IOH = -12 mA No load, 27 MHz 2.4 0.4 VDD-0.4 45 20 80 mA mA Notes: 1. Nominal switching threshold is VDD/2 MDS 556-04 C In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER AC Electrical Characteristics VDD = 2.5 V 5%, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Input Frequency Output Rise Time Output Fall Time Output to output skew Duty Cycle Symbol tOR tOF Note 1 Conditions 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Rising edges at VDD/2 Measured at VDD/2 Min. 5 Typ. 1.8 1.8 0 Max. Units 27 2.5 2.5 50 55 MHz ns ns ps % 45 50 VDD = 3.3 V 5%, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Input Frequency Output Rise Time Output Fall Time Output to output skew Duty Cycle Phase Noise at 1MHz from carrier Clock Jitter RMS 1KHz to 1MHz Symbol tOR tOF Note 1 Conditions 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Rising edges at VDD/2 Measured at VDD/2 Min. 5 Typ. 0.6 0.6 0 Max. Units 27 1.0 1.0 50 55 MHz ns ns ps % dBc/Hz 6 ps 45 50 -125 VDD = 5 V 5%, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Input Frequency Output Rise Time Output Fall Time Output to output skew Duty Cycle Symbol tOR tOF Note 1 Conditions 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Rising edges at VDD/2 Measured at VDD/2 Min. 5 Typ. 0.3 0.3 0 Max. Units 27 0.7 0.7 50 55 MHz ns ns ps % 45 50 Notes: 1. Between any two outputs with equal loading. Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 150 140 120 40 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 556-04 C In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Inches Min Max Symbol Min Max A A1 E INDEX AREA H 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.25 0.40 0 h x 45 1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8 .0532 .0040 .013 .0075 .1890 .1497 .2284 .010 .016 0 .0688 .0098 .020 .0098 .1968 .1574 .2440 .020 .050 8 B C D E e H h L 12 D 1.27 BASIC 0.050 BASIC A A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number ICS556M-04I ICS556M-04IT ICS556M-04ILF ICS556M-04ILFT Marking 556M-04I 556M-04I 556M04IL 556M04IL Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature -40 to +85C -40 to +85C -40 to +85C -40 to +85C "LF" denotes Pb free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 556-04 C In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 tel (4 08) 297-1 201 w w w. i c s t . c o m |
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